View HV4530_120668.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

HV4530 HV4630
32-Channel Serial To Parallel Converter with P-Channel Open Drain Outputs Ordering Information
Device HV4530 HV4630 Recommended Operating VPP Max -300 -300 Package Options 44 J-Lead Quad Plastic Chip Carrier HV4530PJ HV4630PJ 44 Quad Plastic Gullwing HV4530PG HV4630PG Die HV4530X HV4630X
Features
Processed with HVCMOS Technology Output voltages to -300V Source current minimum 60 mA Shift register speed 8 MHz Polarity and blanking inputs CMOS compatible inputs Forward and reverse shifting options 44-lead plastic and ceramic surface mount packages Hi-Rel processing available Can be used with the HV55 and HV56 to provide 300V push pull operation
General Description
The HV45 and HV46 are low-voltage serial to high-voltage parallel converters with P-Channel open drain outputs. These devices have been designed for use as drivers for AC-electroluminescent displays. They can also be used in any application requiring multiple output high-voltage current source capabilities such as driving inkjet and electrostatic print heads, plasma panels, or vacuum fluorescent displays. These devices consist of a 32-bit shift register, 32 data latches, and control logic to perform polarity and blanking functions. Data is shifted through the shift register on the logic high-to-low transition of the clock. The HV45 shifts in the counterclockwise direction when viewed from the top of the package and the HV46 shifts in the clockwise direction. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register. The data in the shift register is latched when the latch enable pin is brought to logic high and then returned to ground. If the latch enable pin is held high, the latch becomes transparent and the shift register data is directly reflected in the outputs. For applications requiring active pull down as well as pull up, the HV45 and HV46 can be paired with the HV55 and HV56 devices, respectively.
Absolute Maximum Ratings1
Supply voltage, VDD Off state output voltage HV4630 HV4622 Logic input levels Ground current2 dissipation 3 +0.5V to -16V +0.5V to -315V +0.5V to -240V +0.5V to VDD - 0.3V 1.5A 1200mW -40C to +85C -65C to +150C 260C
Continuous total power
Operating temperature range Storage temperature range Lead temperature 1.6mm (1/16 inch) from case for 10 seconds
Notes: 1. All voltages are referenced to VSS. 2. Duty cycle is limited by the total power dissipated in the package. 3. For operation above 25C ambient derate linearly to maximum operating temperature at 20mW/C for plastic and at 15mW/C for ceramic.
03/13/02
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
1
HV4530//HV4630
Electrical Characteristics1 (over recommended operating conditions unless noted)
DC Characteristics
Symbol IDD IDDQ IO(OFF) IIH IIL VOH VOL VOC Parameter VDD supply current Quiescent VDD supply current Off state output current High-level logic input current Low-level logic input current High-level output data out Low-level output voltage HVOUT Data out HVOUT clamp voltage VDD + 1.0V -30.0 -1.0 +1.5 Min Max -15 -100 -100 -1 +1 Units mA A A A A V V V V Conditions fCLK = 8 MHz FDATA = 4 MHz VIN = VSS or VDD All SWS parallel VIH = VDD VIL = VSS IDout = -100A IHVout = -60mA IDout = -100A IOL = +60mA
AC Characteristics (VDD = -12V, TC = 25C)
Symbol fCLK tWH/tWL tSU tH tON tDHL tDLH tDLE tWLE tSLE Parameter Clock frequency Clock width high or low Data set-up time before clock rises Data hold time after clock rises Turn ON time, HVOUT from enable Delay time clock to data high to low Delay time clock to data low to high Delay time clock to LE low to high Width of LE pulse LE set-up time before clock falls 50 50 50 62 50 20 400 100 100 Min Max 8 Units MHz ns ns ns ns ns ns ns ns ns RL = 10K to VOO MAX CL = 15pF CL = 15pF Conditions
Recommended Operating Conditions
Symbol VDD HVOUT VIH VIL fCLK TA Logic supply voltage Output off voltage High-level input voltage (LOGIC "1") Low-level input voltage (LOGIC "0") Clock frequency Operating free-air temperature -40 Parameter Min -10.8 +0.3 VDD + 2V 0 Max -13.2 -300 VDD -2.0 8 +85 Units V V V V MHz C
Note: All voltages are referenced to VSS.
2
HV4530//HV4630
Input and Output Equivalent Circuits
VSS VSS
VSS
Input
Data Out
HVOUT
VDD Logic Inputs
VDD Logic Data Output High Voltage Output
Switching Waveforms
VSS Data Input 50% tSU Clock 50% tWH 50% tWL 50% VSS-12 Data Out tDHL 50% tDLH VSS VSS-12 Data Valid tH VSS 50% 50% VSS-12 VSS 50% VSS-12
Latch Enable tDLE
50% tWLE
50% tSLE
VSS VSS-12
HV OUT w/ S/R HIGH
VSS 10% tON VOO
3
HV4530//HV4630
Functional Block Diagram
VSS Polarity Blanking Latch Enable Data Input Clock Latch 32-Bit Shift Register Latch HVOUT2 (Outputs 3 to 30 not shown) Latch
HVOUT1
HVOUT31
Data Out
Latch
HVOUT32
Function Table
Inputs Function All on All off Invert mode Load S/R Load latches Transparent latch mode Data X X X H or L X X L H CLK X X X
Outputs BL L L H H H H H H POL L H L H H L H H Shift Reg 1 2...32 * * * *...* *...* *...* HV Outputs 1 2...32 ON ON...ON Data Out * * * * * * * * *
LE X X L L

OFF OFF...OFF * * * * OFF ON *...* *...* *...* *...* *...* *...*
H or L *...* * * L H *...* *...* *...* *...*
H or L H or L

H H
Notes: H = high level = -12V, L = low level = 0V, X = irrelevant, = high-to-low transition, = low-to-high transition. * = dependent on previous stage's state before the last CLK high-to-low transition or last LE high.
4
HV4530//HV4630
Pin Configurations
HV45 44 Pin J-Lead Package Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Function HVOUT 17 HVOUT 18 HVOUT 19 HVOUT 20 HVOUT 21 HVOUT 22 HVOUT 23 HVOUT 24 HVOUT 25 HVOUT 26 HVOUT 27 HVOUT 28 HVOUT 29 HVOUT 30 HVOUT 31 HVOUT 32 N/C Data Out N/C N/C N/C Polarity Pin 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Function Clock VSS VDD Latch Enable Data In Blanking HVOUT 1 HVOUT 2 HVOUT 3 HVOUT 4 HVOUT 5 HVOUT 6 HVOUT 7 HVOUT 8 HVOUT 9 HVOUT 10 HVOUT 11 HVOUT 12 HVOUT 13 HVOUT 14 HVOUT 15 HVOUT 16
Package Outline
39 38 37 36 35 34 33 32 31 30 29 40 41 42 43 44 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 28 27 26 25 24 23 22 21 20 19 18
top view 44-pin J-Lead Package
HV46 44 Pin J-Lead Package Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Function HVOUT 16 HVOUT 15 HVOUT 14 HVOUT 13 HVOUT 12 HVOUT 11 HVOUT 10 HVOUT 9 HVOUT 8 HVOUT 7 HVOUT 6 HVOUT 5 HVOUT 4 HVOUT 3 HVOUT 2 HVOUT 1 N/C Data Out N/C N/C N/C Polarity Pin 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Function Clock VSS VDD Latch Enable Data In Blanking HVout 32 HVOUT 31 HVOUT 30 HVOUT 29 HVOUT 28 HVOUT 27 HVOUT 26 HVOUT 25 HVOUT 24 HVOUT 23 HVOUT 22 HVOUT 21 HVOUT 20 HVOUT 19 HVOUT 18 HVOUT 17
5
HV4530//HV4630
Pin Configurations
HV45 44-Pin Plastic Gullwing (QFP) Package Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Function HVOUT 12 HVOUT 13 HVOUT 14 HVOUT 15 HVOUT 16 HVOUT 17 HVOUT 18 HVOUT 19 HVOUT 20 HVOUT 21 HVOUT 22 HVOUT 23 HVOUT 24 HVOUT 25 HVOUT 26 HVOUT 27 HVOUT 28 HVOUT 29 HVOUT 30 HVOUT 31 HVOUT 32 N/C Pin 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Function Data Out N/C N/C N/C Polarity Clock VSS VDD Latch Enable Data In Blanking HVOUT 1 HVOUT 2 HVOUT 3 HVOUT 4 HVOUT 5 HVOUT 6 HVOUT 7 HVOUT 8 HVOUT 9 HVOUT 10 HVOUT 11
Package Outline
44 43 42 41 40 39 38 37 36 35 34 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 33 32 31 30 29 28 27 26 25 24 23
top view 44-pin PQFP Package
HV46 44-Pin Plastic Gullwing (QFP) Package Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Function HVOUT 21 HVOUT 20 HVOUT 19 HVOUT 18 HVOUT 17 HVOUT 16 HVOUT 15 HVOUT 14 HVOUT 13 HVOUT 12 HVOUT 11 HVOUT 10 HVOUT 9 HVOUT 8 HVOUT 7 HVOUT 6 HVOUT 5 HVOUT 4 HVOUT 3 HVOUT 2 HVOUT 1 N/C Pin 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Function Data Out N/C N/C N/C Polarity Clock VSS VDD Latch Enable Data In Blanking HVOUT 32 HVOUT 31 HVOUT 30 HVOUT 29 HVOUT 28 HVOUT 27 HVOUT 26 HVOUT 25 HVOUT 24 HVOUT 23 HVOUT 22
03/13//02
(c)2002 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
6
1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 * FAX: (408) 222-4895 www.supertex.com

▲Up To Search▲

Price & Availability of HV4530

	To Download HV4530 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .